Generally, as the integration of Dynamic Random Access Memory(DRAM) has increased, the distance between bit line contacts and word lines as well as the distance between capacitor contacts and bit lines or word lines here decreased rapidly, thereby causing a short phenomena between such contacts and lines.
Hence, process margins decrease since contact formation requires fine control of the alignment tolerance. Leakage current is generated between a diffusion region under a charge storage electrode and a semiconductor substrate as well as between diffusion regions under charge storage electrodes. As the integration of DRAMS has increased, such leakage current has also increased.
Therefore, an object of the present invention is to provide a method of manufacturing a semiconductor memory device capable of increasing the process margin between bit line contacts and the capacitor contacts, thereby decreasing the amount of current leakage between memory cells.